Picture Processing Unit: Difference between revisions

Revision as of 16:59, 26 May 2007

Revision as of 07:58, 18 November 2007

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The '''PPU (Picture Processing Unit)''', more specifically known as [[Ricoh]] RP2C02 ([[NTSC]] version) / RP2C07 ([[PAL]] version), is the [[microprocessor]] in the [[Nintendo Entertainment System]] responsible for generating video signals from graphic data stored in memory.

The chip is known for its effective use of [[Memory (computers)|memory]], using very little memory to store graphical data. It was rather advanced for its time when the [[Nintendo Entertainment System|Famicom]] (first Japanese version of the Nintendo Entertainment System) was released, sporting full [[Sprite (computer graphics)|sprite]] support, movable backgrounds, and many colors on screen at the same time. To compete with other video game systems, like the technically superior [[Sega MegaDrive]], [[Nintendo]] also extended the PPU's technical capabilities through the use of [[Multi-Memory Controller|mappers]], placed on the game cartridge. The mappers added more memory or could bank switch data into the PPU's [[address space]], making it possible to create more advanced graphics, using more colors and bigger [[Tiletile set|tile sets]]s.

==Key features==

*2KB external [[RAM]] for graphics information storage

*256 2KBbytes externalfor [[RAM]]Sprite for(computer graphics)|sprite]] informationdata storage

* 25632 bytes for [[Sprite (computer graphics)|sprite]] datapalette storage

* 8 × 8 or 8 × 16 (selectable) sized [[Tile|tilestile]]s

* 32 bytes for palette storage

* Two 4KB [[Tiletile set|tile sets]]s with space for 256 tiles each

* 8 × 8 or 8 × 16 (selectable) sized [[Tile|tiles]]

* Up to 64 sprites (movable objects) on screen simultaneously (only 8 visible per [[scan line]])

* Two 4KB [[Tile set|tile sets]] with space for 256 tiles each

* 25 colors simultaneously (although more colors are possible using programming tricks) from a hardware [[Palette (computing)|color palette]] of 64 colors

* Up to 64 sprites (movable objects) on screen simultaneously (only 8 visible per [[scan line]])

* Picture resolution of 256 × 240 pixels (fully visible on PAL, but cropped to 256 × 224 on most [[NTSC]] television sets)

* 25 colors simultaneously (although more colors are possible using programming tricks) from a hardware [[Palette (computing)|color palette]] of 64 colors

* Picture resolution of 256 × 240 pixels (fully visible on PAL, but cropped to 256 × 224 on most [[NTSC]] television sets)

==Technical information==

The PPU is controlled via eight [[Processor register|registers]] visible in the [[CPU]]'s address space in the addresses $2000 through $2007. All data and information is passed to the PPU through these, except the raw tile data, which is hardwired to the PPU's address space. The PPU uses the tile graphics data together with information stored by the program in the PPU's RAM, such as color and position, to render the final graphical output to the screen.

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==External links==

* [http://nesdev.parodius.com/NinTech.txt Technical information about the PPU]

* [http://nesdev.parodius.com/2C02%20technical%20reference.TXT Very detailed technical information]

[[Category:Graphics chips]]