Flow to HDL: Difference between revisions

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This page is'''Flow to describeHDL''' tools and methods that convert Flow flow-based system design into a [[hardware description languageslanguage]] like(HDL) such as [[VHDL]] or [[Verilog]]. Typically this is a method of creating designs for [[Fieldfield-programmable gate array]], [[ASICapplication-specific integrated circuit]] prototyping and [[DSP]]{{clarifyme|date=16 February 2009}} design. Flow -based system design is well -suited to [[Fieldfield-programmable gate array|FPGA]] design as it's is easier to specify the innate parallelism of the architecture.
 
== History==
The use of flow-based design tooltools in engineering is a reasonably new trend, most widely used example is. [[Unified Modeling Language|UML]] is the most widely-used example for software design. The use of flow -based design tools creates in theory allows for more holistic system design and faster development. [[C Thereto are otherHDL]] tools and flow thathave aima tosimillar achieve the sameaim, but with [[C (programming language)|C]] or C -like languages, these are discussed in the [[Cprogramming to HDLlanguage]] pages.
 
== Applications ==
ApplicationMost currentlyapplications are mainly the sort of applications thatones currentlywhich take too long with existing supercomputer architectures. These may include Bioinfomaticsbioinfomatics, CFD,{{clarifyme|date=16 FinancialFebruary 2009}} financial processing, Oiland oil and Gasgas survey data analysis. Embedded applications that require high performance or real-time data processing isare also an area of use. Also [[System-on-a-chip]] design can also be done using this flow.
 
== Examples ==