Template:Infobox CPU architecture/doc: Difference between revisions

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=== Parameters ===

All parameters are optional.

; name: Name of architecture, e.g. x86, SPARC, PowerPC, MIPS, ARM

; designer: Designer of the architecture

; bus: Width of bus, e.g. 32-bit, 64-bit

; introduced: Year introduced

; version: Version/revision of architecture/ISA

; design: Design strategy, e.g. RISC, CISC

; type: Type of architecture, e.g. Register-Register, Register-Memory, Memory-Memory

; encoding: Instruction set encoding, e.g. Fixed or Variable

; branching: Branching evaluation, e.g. Condition register, Condition code, Compare and branch

; endianness: Byte ordering, i.e. Little, Big, Bi

; extensions: ISA extensions, i.e. MMX, SSE, AltiVec, etc

; open: Is the architecture open or not? (as in free or proprietary)

; registers: Number and size of process registers, general purpose registers, floating-point registers, etc

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