Inter-processor interrupt: Difference between revisions

Revision as of 05:29, 30 November 2005

Revision as of 05:37, 30 November 2005

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An '''Inter-Processor Interrupt''' ('''IPC''') is a special type of [[interrupt]] by which one processor may interrupt another processor in a [[multiprocessor]] system. IPCs are typically used to implement a [[cache coherrency]] [[synchronization]] point.

In [[x86]] base systems, an IPC synchronizes the cache and [[Memory Management Unit]] (MMU) between processors.

== See Also ==

* [[Advanced Programmable Interrupt Controller]]

* [[Interrupt]]

* [[Interrupt Handler]]

* [[Non-Maskable Interrupt]]

* [[Programmable Interrupt Controller]]

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