Address decoder: Difference between revisions

Revision as of 22:08, 28 April 2010

Revision as of 22:09, 28 April 2010

Line 1:

In [[digital electronics]], an '''Address decoder''' is a [[decoder]] circuit that has two or more bits of an [[address bus]] as inputs and that has one or more device selection lines as outputs.<ref name="TAoE">{{cite book|author=[[Paul Horowitz]] and [[Winfield Hill]]|title=[[The Art of Electronics]]|edition=Second edition2nd|year=1989|publisher=Cambridge University Press|isbn=9780521370950|page=685,766}}</ref> When the address for a particular device appears on the address bus, the address decoder asserts the selection line for that device. A separate single-device address decoder may be incorporated into each device on an address bus, or a single address decoder may serve multiple devices.<ref>{{cite book

|author=S. J. Cahill

|title=Digital and microprocessor engineering

|url=http://books.google.com/books?id=zwJTAAAAMAAJ

|edition=Second edition2nd

|year=1993

|publisher=Ellis Horwood