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The '''Tomasulo algorithm''' is a hardware [[algorithm]] developed in 1967 by [[Robert Tomasulo]] from [[IBM]]. It allows sequential instructions that would normally be stalled due to certain dependencies to execute non-sequentially ([[out-of-order execution]]). It was first implemented for the [[IBM System/360]] Model 91’s floating point unit.
This algorithm differs from [[scoreboarding]] in that it utilizes [[register renaming]]. Where scoreboarding resolves Write-after-Write (WAW) and Write-after-Read (WAR) [[Hazard (computer architecture)|hazards]] by stalling, register renaming allows the continual issuing of instructions. The Tomasulo algorithm also uses a [[common data bus]] (CDB) on which computed values are broadcast to all the [[reservation stations]] that may need it. This allows for improved parallel execution of instructions which may otherwise stall under the use of scoreboarding.
Robert Tomasulo received the [[Eckert-Mauchly Award]] in 1997 for this algorithm.
==Implementation concepts==
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