Signoff (electronic design automation): Difference between revisions

Revision as of 13:09, 12 February 2013

Revision as of 04:52, 12 March 2013

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== Check types ==

Signoff checks xhave become more complex as [[VLSI]] designs approach [[32nm]] and [[22nm]] process nodes because of the increased impact of previously ignored (or more crudely approximated) second order effects. There are several categories of signoff checks.

* [[Design rule checking|DRC]] - Also sometimes known as geometric verification, this involves verifying if the design can be reliably [[semiconductor fabrication|manufactured]] given current photolithography limitations. In advanced process nodes, [[Design for manufacturability (IC)|DFM]] rules are upgraded from optional (for better yield) to required.