Revision as of 23:42, 9 December 2014 edit Drmajidn (talk \| contribs) 35 edits →See also ← Previous edit		Revision as of 12:49, 10 December 2014 edit undo MrOllie (talk \| contribs) Extended confirmed users, Pending changes reviewers, Rollbackers 255,629 edits Reverted 1 edit by Drmajidn (talk). (TW) Next edit →
Line 29: * [[Logic synthesis]] * [[Logisim]] * [[DLD - Digital Logic Design]] * [[List of Verilog simulators]] * [[Functional verification]]

Logic simulation: Difference between revisions