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When a single address decoder serves multiple devices, an address decoder with n address input bits can serve up to 2<sup>n</sup> separate devices. Several members of the [[List of 7400 series integrated circuits|7400 series]] of [[integrated circuit]] are address decoders. An example is the 74154.<ref>[http://web.mit.edu/6.115/www/datasheets/74hc154.pdf Datasheet for 74HC154]</ref>
This address decoder has four address inputs and sixteen (i.e., 2<sup>4</sup>) device selector outputs. An address decoder is also referred to as a "[[demultiplexer]]" or "demux", although these terms are more general and can refer to devices other than address decoders. The 74154 mentioned above can be called a "4-to-16
Address decoders are fundamental building blocks for systems that use [[Bus (computing)|buses]]. They are represented in all integrated circuit families and processes and in all standard [[FPGA]] and [[Application-specific integrated circuit|ASIC]] libraries. They are discussed in introductory textbooks in digital logic design.<ref name="TAoE"/>
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