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*"The 10 Coolest Technologies You’ve Never Heard Of – Chaos Computing," PC Magazine, Vol. 25, No. 13, page p. 66, August 8, 2006. [http://www.pcmag.com/article2/0,2704,1990288,00.asp]
*"Logic from Chaos," MIT Technology Review, June 15, 2006. [http://www.technologyreview.com/Biztech/16989/]
*"Exploiting the controlled responses of chaotic elements to design configurable hardware," W. L. Ditto and S. Sinha, Philosophical Transactions of the Royal Society London A, 364, pp. 2483–2494 (2006) {{doi|10.1098/rsta.2006.1836}}.
*"Chaos Computing: ideas and implementations" William L. Ditto, K. Murali and S. Sinha, Philosophical Transactions of the Royal Society London A, (2007) {{doi|10.1098/rsta.2007.2116}}.
*"Experimental realization of the fundamental NOR Gate using a chaotic circuit," K. Murali, Sudeshna Sinha and William L. Ditto Phys. Rev. E 68, 016205 (2003). {{doi|10.1103/PhysRevE.68.016205}}
*"Implementation of NOR gate by a chaotic Chua’s circuit," K. Murali, Sudeshna Sinha and William L. Ditto, Int. J. of Bifurcation and Chaos, Vol. 13, No. 9, pp. 1–4, (2003). {{doi|10.1142/S0218127403008053}}
*"Fault tolerance and detection in chaotic Computers" M.R. Jahed-Motlagh, B. Kia, W.L. Ditto and S. Sinha, International Journal of Bifurcation and Chaos 17, 1955-1968(2007){{doi|10.1142/S0218127407018142}}
*"Chaos-based computation via Chua's circuit: parallel computing with application to the SR flip-flop"D. Cafagna, G. Grassi, International Symposium on Signals, Circuits and Systems, ISSCS 2005, Volume: 2, 749-752 (2005) {{doi|10.1109/ISSCS.2005.1511349}}
*"Parallel computing with extended dynamical systems" S. Sinha, T. Munakata and W.L. Ditto; Physical Review E, 65 036214 [1-7](2002) {{doi|10.1103/PhysRevE.65.036214}}
*"Reconfigurable logic blocks Based on a chaotic Chua circuit," H. R. Pourshaghaghi, B. Kia, W. Ditto and M. R. Jahed-Motlagh, to be published in CHAOS, SOLITONS & FRACTALS {{doi|10.1016/j.chaos.2007.11.030}}
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