Memory hierarchy: Difference between revisions

Revision as of 21:59, 14 October 2004

Revision as of 19:59, 3 November 2004

Line 1:

The [[hierarchical]] arrangement of [[storage]] in current [[computer architecture]]s is called the '''memory hierarchy'''. Each level of the hierarchy is of higher speed and lower latency, and is of smaller size, than lower levels.

Most modern [[KIMCPU]]s are so fast that for most program workloads the [[locality of reference]] of memory accesses, and the efficiency of the [[caching]] and memory transfer between different levels of the hierarchy, is the practical limitation on processing speed. As a result, the CPU spends much of its time idling, waiting for memory I/O to complete.

The memory hierarchy in most computers is as follows: