Dynamic frequency scaling: Difference between revisions

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Voltage is therefore the main determinant of power usage and heating.<ref>{{cite web|url=https://software.intel.com/en-us/blogs/2014/02/19/why-has-cpu-frequency-ceased-to-grow|author= Victoria Zhislina|date=2014-02-19|title=Why has CPU frequency ceased to grow?|publisher=Intel}}</ref> The voltage required for stable operation is determined by the frequency at which the circuit is clocked, and can be reduced if the frequency is also reduced.<ref>https://www.usenix.org/legacy/events/hotpower/tech/full_papers/LeSueur.pdf</ref> Dynamic power alone does not account for the total power of the chip, however, as there is also static power, which is primarily because of various leakage currents. Due to static power consumption and asymptotic execution time it has been shown that the energy consumption of a piece of software shows convex energy behavior, i.e., there exists an optimal CPU frequency at which energy consumption is minimal.<ref>{{cite journal | author = K. De Vogeleer| title = The Energy/Frequency Convexity Rule: Modeling and Experimental Validation on Mobile Devices |year=2014 | arxiv = 1401.4655|display-authors=etal}}</ref>

[[Subthreshold leakage|Leakage current]] has become more and more important as transistor sizes have become smaller and threshold voltage levels lower. A decade ago, dynamic power accounted for approximately two-thirds of the total chip power. The power loss due to leakage currents in contemporary CPUs and SoCs tend to dominate the total power consumption. In the attempt to control the leakage power, [[High-κ dielectric|high-k metal-gates]] and power gating have been common methods.

[[Dynamic voltage scaling]] is another related power conservation technique that is often used in conjunction with frequency scaling, as the frequency that a chip may run at is related to the operating voltage.