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| year = 1999
| title = Processor Architecture
|url=https://archive.org/details/processorarchite0000silc |url-access=registration | publisher = Springer
| isbn = 3-540-64798-8
}}</ref>), the [[Instruction prefetch|prefetch]] mechanism can stay ahead of the instructions stream. This acts like a very small [[instruction cache]], but its behaviour can be predicted at [[compile time]], making timing behaviour as predictable as functional behaviour.
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