Revision as of 21:21, 4 December 2018 edit Fru1tbat (talk \| contribs) Extended confirmed users 13,362 edits →PIO mode in the ATA interface: wiki article, not GL819 datasheet ← Previous edit		Revision as of 17:59, 5 December 2018 edit undo Wtshymanski (talk \| contribs) Extended confirmed users 76,268 edits →PIO mode in the ATA interface: sentence fragment Next edit →
Line 7: == PIO mode in the ATA interface == ~~Until the introduction of [[Direct memory access\|DMA]], PIO was the only available method.~~ The PIO interface is grouped into different modes that correspond to different [[transfer rate]]s. The [[electrical signal]]ing among the different modes is similar — only the cycle time between transactions is reduced in order to achieve a higher transfer rate. All ATA devices support the slowest mode — Mode 0. By accessing the information registers (using Mode 0) on an ATA drive, the CPU is able to determine the maximum transfer rate for the device and configure the ATA controller for optimal performance.

Programmed input–output: Difference between revisions