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Typically, chips supporting ISP have internal circuitry to generate any necessary programming voltage from the system's normal supply voltage, and communicate with the programmer via a serial protocol. Most programmable logic devices use a variant of the [[JTAG]] protocol for ISP, in order to facilitate easier integration with automated testing procedures. Other devices usually use proprietary protocols or protocols defined by older standards. In systems complex enough to require moderately large [[glue logic]], designers may implement a JTAG-controlled programming subsystem for non-JTAG devices such as [[flash memory]] and microcontrollers, allowing the entire programming and test procedure to be accomplished under the control of a single protocol.
== Devices supporting
A number of devices presently support in-system programming. These include:
* ARM processors.
* AVR
* PIC
* 8051 based
Example of devices using ISP is the [[Atmel AVR|AVR]] line of micro-controllers by [[Atmel]] such as the [[ATmega#Basic families|ATmega]] series.
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[[File:Icsp-pinouts.png|thumb|Typical chip connections]]
* ''' V<sub>pp</sub> ''' - Programming mode voltage. This must be connected to the MCLR pin, or the V<sub>pp</sub> pin of the optional ICSP port available on some large-pincount PICs.
* ''' V<sub>dd</sub> ''' - This is the positive power input to the PIC. Some programmers require this to be provided by the circuit (circuit must be at least partially powered up), some programmers expect to drive this line themselves and require the circuit to be off, while others can be configured either way (like the Microchip ICD2). The Embed Inc programmers expect to drive the V<sub>dd</sub> line themselves and require the target circuit to be off during programming.
* ''' V<sub>ss</sub> ''' - Negative power input to the PIC and the zero volts reference for the remaining signals. Voltages of the other signals are implicitly with respect to V<sub>ss</sub>.
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