No instruction set computing: Difference between revisions

Revision as of 05:29, 10 July 2019

Revision as of 02:41, 31 May 2020

Line 1:

{{Merge|Zero instruction set computer|discuss=Talk:No instruction set computing#Proposed merge with Zero instruction set computer|date=July 2019}}

{{Multiple issues|

{{More citations needed|date=January 2012}}

{{Technical|date=October 2010}}

{{Update|date=January 2017}}

{{Merge|Zero instruction set computer|discuss=Talk:No instruction set computing#Proposed merge with Zero instruction set computer|date=July 2019}}

}}

'''No instruction set computing''' ('''NISC''') is a computing architecture and compiler technology for designing highly efficient custom processors and hardware accelerators by allowing a compiler to have low-level control of hardware resources.