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add reference describing this technique. |
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([https://www.chipestimate.com/Demystifying-MIPI-C-PHY--DPHY-Subsystem-Tradeoffs-Challenges-and-Adoption-/Mixel/Technical-Article/2018/04/24 mirror])
</ref> are both more immune to outside interference, and emit less interference to other devices.
* bus multiplexing: Many early microprocessors and many early DRAM chips reduced costs by using bus multiplexing, rather than dedicate a pin to every address bit and data bit of the [[system bus]]. One approach re-uses the address bus pins at different times for data bus pins,<ref>
Don Lancaster. [https://www.tinaja.com/ebooks/tvtcb.pdf "TV Typewriter Cookbook"]. ([[TV Typewriter]]). Section "Bus Organization". p. 82. </ref> an approach used by [[conventional PCI]]. Another approach re-uses the same pins at different times for the upper half and for the lower half of the address bus, an approach used by many [[dynamic random-access memory]] chips, adding 2 pins to the control bus -- a row-address strobe ({{overline|RAS}}) and the column-address strobe ({{overline|CAS}}). == Implementation method ==
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