Convolutional code: Difference between revisions

Revision as of 11:21, 7 October 2019

Revision as of 07:08, 11 October 2019

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[[File:Syst-nonsyst.png|right|350px|thumb|A short classification of convolutional codes based on the encoding way. Non-systematic convolutional codes are more popular due to better noise immunity. It relates to the free distance of the convolutional code.<ref>Moon, Todd K. "Error correction coding." Mathematical Methods and Algorithms. Jhon Wiley and Son (2005). - p. 508</ref>]]

[[File:Shift regs.png|thumb|350px|Example of shift-register structure (<math>m_1</math> and <math>m_2</math> are the constrain lengths (memory length)).<ref>https://www.mathworks.com/help/comm/ref/poly2trellis.html</ref>]]

To convolutionally encode data, start with ''k'' [[memory register]]s, each holding one input bit. Unless otherwise specified, all memory registers start with a value of 0. The encoder has ''n'' modulo-2 [[Adder (electronics)|adder]]s (a modulo 2 adder can be implemented with a single [[Boolean logic|Boolean]] [[XOR gate]], where the logic is: {{math|1=0+0&nbsp;=&nbsp;0}}, {{math|1=0+1&nbsp;=&nbsp;1}}, {{math|1=1+0&nbsp;=&nbsp;1}}, {{math|1=1+1&nbsp;=&nbsp;0}}), and ''n'' [[generator polynomial]]s &mdash; one for each adder (see figure below). An input bit ''m''₁ is fed into the leftmost register. Using the generator polynomials and the existing values in the remaining registers, the encoder outputs ''n'' symbols. These symbols may be transmitted or punctured depending on the desired code rate. Now [[bit shift]] all register values to the right (''m''₁ moves to ''m''₀, ''m''₀ moves to ''m''₋₁) and wait for the next input bit. If there are no remaining input bits, the encoder continues shifting until all registers have returned to the zero state (flush bit termination).