Revision as of 03:18, 8 February 2020 edit 147.229.208.56 (talk) removed flag which was no longer appropriate ← Previous edit		Revision as of 06:34, 3 August 2020 edit undo LachlanA (talk \| contribs) Extended confirmed users 1,854 edits →Implementations Next edit →
Line 67: ==Implementations== * [[Cisco]] PXF network processor is internally organized as systolic array.<ref>{{~~citation~~cite ~~needed~~web\|~~date~~title=~~January~~Cisco ~~2017~~10000 Series Router Performance Routing Engine Installation\|url=https://www.cisco.com/en/US/products/hw/routers/ps133/prod_installation_guide09186a0080525aba.html#wp48065\|accessdate=3 August 2020}}</ref> * Google’s [[Tensor Processing Unit\|TPU]] is also designed around a systolic array. * Paracel FDF4T TestFinder text search system<ref name="FDF4">{{cite web\|title=About Paracel\|url=http://brandprosgroup.com/pages/first/websites/paracel/data/html/about_paracel2.html\|website=brandprosgroup.com\|publisher=Paracel\|accessdate=4 May 2018}}</ref>

Systolic array: Difference between revisions