Predication (computer architecture): Difference between revisions

Revision as of 05:27, 15 July 2020

Revision as of 05:28, 15 July 2020

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*Predication complicates the hardware by adding levels of [[control unit|logic]] to critical [[datapath|paths]] and potentially degrades clock speed.

*A predicated block includes cycles for all operations, so shorter [[Control flow graph|paths]] may take longer and be penalized.

*Predication is not speculated and causes a longer dependency chain. For mostordered data this translates to a performance loss compared to a predictable branch.<ref>{{cite web |last1=Cordes |first1=Peter |title=assembly - How does Out of Order execution work with conditional instructions, Ex: CMOVcc in Intel or ADDNE (Add not equal) in ARM |url=https://stackoverflow.com/a/50960323 |website=Stack Overflow |quote=Unlike with control dependencies (branches), they don't predict or speculate what the flags will be, so a cmovcc instead of a jcc can create a loop-carried dependency chain and end up being worse than a predictable branch. [https://stackoverflow.com/questions/50959808] is an example of that.}}</ref>

Predication is most effective when paths are balanced or when the longest path is the most frequently executed,<ref name="Fisher04"/> but determining such a path is very difficult at compile time, even in the presence of [[profiling (computer programming)|profiling information]].