Predication (computer architecture): Difference between revisions

Revision as of 01:32, 3 October 2020

Revision as of 15:36, 8 April 2021

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Predication's primary drawback is in increased encoding space. In typical implementations, every instruction reserves a bitfield for the predicate specifying under what conditions that instruction should have an effect. When available memory is limited, as on [[embedded system|embedded devices]], this space cost can be prohibitive. However, some architectures such as [[Thumb-2]] are able to avoid this issue (see below). Other detriments are the following:<ref name="Fisher04">Joseph A. Fisher, Paolo Faraboschi, Cliff Young (2004) ''Embedded Computing - A VLIW Approach to Architecture, Compilers, and Tools''. Page 172.</ref>

*Predication complicates the hardware by adding levels of [[control unit|logic]] to critical [[datapath|paths]] and potentially degrades clock speed.

*A predicated block includes cycles for all operations, so shorter [[Control control-flow graph|paths]] may take longer and be penalized.

*Predication is not speculated and causes a longer dependency chain. For ordered data this translates to a performance loss compared to a predictable branch.<ref>{{cite web |last1=Cordes |first1=Peter |title=assembly - How does Out of Order execution work with conditional instructions, Ex: CMOVcc in Intel or ADDNE (Add not equal) in ARM |url=https://stackoverflow.com/a/50960323 |website=Stack Overflow |quote=Unlike with control dependencies (branches), they don't predict or speculate what the flags will be, so a cmovcc instead of a jcc can create a loop-carried dependency chain and end up being worse than a predictable branch. [https://stackoverflow.com/questions/50959808] is an example of that.}}</ref>