Reconfigurable computing: Difference between revisions

Revision as of 07:55, 6 December 2020

Revision as of 11:04, 20 January 2021

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One research area is the twin-paradigm programming tool flow productivity obtained for such heterogeneous systems.<ref name="Esam2009">{{cite journal |author1= Esam El-Araby |author2= Ivan Gonzalez |author3= Tarek El-Ghazawi |title= Exploiting Partial Runtime Reconfiguration for High-Performance Reconfigurable Computing |journal= ACM Transactions on Reconfigurable Technology and Systems |volume= 1 |number= 4 |date= January 2009 |doi= 10.1145/1462586.1462590 |pages=1–23}}</ref>

The US [[National Science Foundation]] has a center for high-performance reconfigurable computing (CHREC).<ref>{{cite web |title= NSF center for High-performance Reconfigurable Computing |work= official web site |url= http://www.chrec.org/ |accessdateaccess-date= August 19, 2011 }}</ref>

In April 2011 the fourth Many-core and Reconfigurable Supercomputing Conference was held in Europe.<ref>{{cite web |title=Many-Core and Reconfigurable Supercomputing Conference |year=2011 |work=official web site |url=http://www.mrsc2011.eu/ |archive-url=https://web.archive.org/web/20101012042408/http://www.mrsc2011.eu/ |url-status=dead |archive-date=October 12, 2010 |accessdateaccess-date=August 19, 2011 }}</ref>

Commercial high-performance reconfigurable computing systems are beginning to emerge with the announcement of [[IBM]] integrating FPGAs with its [[IBM POWER microprocessors|POWER]] processor.<ref>

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|publisher= HPCwire

|date= 2014-11-17

|accessdateaccess-date = 2014-12-14}}

</ref>

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===Computer emulation ===

[[File:FPGARetrocomputing.jpg|An FPGA board is being used to recreate the Vector-06C computer|thumb]]

With the advent of affordable FPGA boards, students' and hobbyists' projects seek to recreate vintage computers or implement more novel architectures.<ref name="apple">{{cite web|url=https://www.cs.columbia.edu/~sedwards/apple2fpga/|title=Apple2 FPGA|accessdateaccess-date=6 Sep 2012

}}</ref><ref name="risc">{{cite web|url=http://www.inf.ethz.ch/personal/wirth/Articles/Miscellaneous/RISC.pdf |title=The Design of a RISC Architecture and its Implementation with an FPGA |author=Niklaus Wirth |accessdateaccess-date=6 Sep 2012 }}{{dead link|date=June 2016|bot=medic}}{{cbignore|bot=medic}}</ref><ref name="soc">{{cite web|author=Jan Gray

|url=http://www.fpgacpu.org/papers/soc-gr0040-paper.pdf|title=Designing a Simple FPGA-Optimized RISC CPU and System-on-a-Chip|accessdateaccess-date=6 Sep 2012

}}</ref> Such projects are built with reconfigurable hardware (FPGAs), and some devices support emulation of multiple vintage computers using a single reconfigurable hardware ([[C-One]]).