OneAPI (compute acceleration): Difference between revisions

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'''oneAPI''' is an [[open standard]] of a unified [[application programming interface]]s intenededintended to be used across different compute [[Hardware acceleration|accelerator]] ([[coprocessor]]) architectures. It is intended to eliminate the need for developers to maintain separate code bases, multiple programming languages, and different tools and workflows for each architecture.<ref>{{Cite web|url=https://www.hpcwire.com/2019/12/09/intel-expands-its-silicon-portfolio-and-oneapi-software-initiative-for-next-generation-hpc/|title=Intel Expands its Silicon Portfolio, and oneAPI Software Initiative for Next-Generation HPC|date=2019-12-09|website=HPCwire|language=en-US|access-date=2020-02-11}}</ref><ref>{{Cite web|url=https://www.hpcwire.com/2019/11/17/intel-debuts-new-gpu-ponte-vecchio-and-outlines-aspirations-for-oneapi/|title=Intel Debuts New GPU – Ponte Vecchio – and Outlines Aspirations for oneAPI|date=2019-11-18|website=HPCwire|language=en-US|access-date=2020-02-11}}</ref><ref>{{Cite web|url=https://www.extremetech.com/computing/302284-sc19-intel-unveils-new-gpu-stack-oneapi-development-effort|title=SC19: Intel Unveils New GPU Stack, oneAPI Development Effort - ExtremeTech|website=www.extremetech.com|access-date=2020-02-11}}</ref><ref>{{Cite web|url=https://www.servethehome.com/intel-one-api-to-rule-them-all-is-much-needed/|title=Intel One API to Rule Them All Is Much Needed to Expand TAM|last=Kennedy|first=Patrick|date=2018-12-24|website=ServeTheHome|language=en-US|access-date=2020-02-11}}</ref>

== The oneAPI Specification ==

The oneAPI specification extends existing developer programming models to enable multiple hardware architectures through a data-parallel language, a set of library APIs, and a low-level hardware interface to support cross-architecture programming. It builds upon industry standards and provides an open, cross-platform developer stack.<ref>{{Cite web|url=https://spec.oneapi.com/oneAPI/|title=The oneAPI Specification|last=|first=|date=|website=oneAPI|url-status=live|archive-url=|archive-date=|access-date=}}</ref>

== The Language – Data Parallel C++ ==

DPC++<ref>{{Cite web|url=https://www.apress.com/gp/data-parallel-c-advanced-chapters-just-released/17382670|title=Data Parallel C++: Mastering DPC++ for Programming of Heterogeneous Systems Using C++ and SYCL|last=|first=|date=|website=Apress|url-status=live|archive-url=|archive-date=|access-date=}}</ref><ref>{{Cite web|url=https://insidebigdata.com/2019/12/16/heterogeneous-computing-programming-oneapi-and-data-parallel-c/|title=Heterogeneous Computing Programming: oneAPI and Data Parallel C++|last=Team|first=Editorial|date=2019-12-16|website=insideBIGDATA|language=en-US|access-date=2020-02-11}}</ref> is an open, cross-architecture language built upon the [[ISO C++]] and [[Khronos Group]] [[SYCL]] standards.<ref>{{Cite web|url=https://www.khronos.org/news/permalink/intels-one-api-project-incorporates-sycl|title=The Khronos Group|date=2020-02-11|website=The Khronos Group|language=en|access-date=2020-02-11}}</ref> DPC++ extends these standards with explicit parallel constructs like sub-groups and unified shared memory offload interfaces to support a broad range of computing architectures and processors, including [[CPU]]s and accelerators. Extensions are contributed back to standards bodies. An example of this is the contribution of unified shared memory, group algorithms and sub-groups to SYCL 2020.<ref>{{Cite web|date=2020-06-30|title=Khronos Steps Towards Widespread Deployment of SYCL with Release of SYCL 2020 Provisional Specification|url=https://www.khronos.org/news/press/khronos-releases-sycl-2020-provisional-specification|access-date=2020-07-06|website=The Khronos Group|language=en}}</ref><ref>{{Cite web|last=staff|date=2020-06-30|title=New, Open DPC++ Extensions Complement SYCL and C++|url=https://insidehpc.com/2020/06/new-open-dpc-extensions-complement-sycl-and-c/|access-date=2020-07-06|website=insideHPC|language=en-US}}</ref><ref>{{Cite web|date=2021-02-09|title=SYCL 2020 Launches with New Name, New Features, and High Ambition|url=https://www.hpcwire.com/2021/02/09/sycl-2020-launches-new-name-new-features/|access-date=2021-02-16|website=HPCwire|language=en-US}}</ref>

== The oneAPI Librarieslibraries ==

The set of APIs<ref>{{Cite web|url=https://www.oneapi.com/spec/|title=oneAPI specification elements|last=|first=|date=|website=oneAPI|url-status=live|archive-url=|archive-date=|access-date=}}</ref> spans several domains that benefit from acceleration, including an interface for deep learning; general libraries for linear algebra math, video, and media processing; and others.

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The [[source code]] of some of the above libraries are available on GitHub.

== The Hardware Abstraction Layer ==

== The Hardware Abstractionabstraction Layerlayer ==

oneAPI Level Zero,<ref>{{Cite web|url=https://www.tomshardware.com/news/intel-releases-bare-metal-oneapi-level-zero-specification|title=Intel Releases Bare-Metal oneAPI Level Zero Specification|last=Verheyde 2019-12-08T16:11:19Z|first=Arne|website=Tom's Hardware|language=en|access-date=2020-02-11}}</ref><ref>{{Cite web|url=https://www.phoronix.com/scan.php?page=news_item&px=Intel-oneAPI-Level-Zero|title=Intel's Compute Runtime Adds oneAPI Level Zero Support - Phoronix|website=www.phoronix.com|access-date=2020-03-10}}</ref><ref>{{Cite web|url=https://www.phoronix.com/scan.php?page=article&item=intel-level-zero&num=1|title=Initial Benchmarks With Intel oneAPI Level Zero Performance - Phoronix|website=www.phoronix.com|access-date=2020-04-13}}</ref> the low-level hardware interface, defines a set of capabilities and services that a hardware accelerator needs to interface with compiler runtimes and other developer tools.