Digital signal processor: Difference between revisions

Revision as of 15:10, 19 March 2021

Revision as of 19:47, 27 March 2021

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*Specialized instructions for [[modular arithmetic|modulo]] addressing in [[circular buffer|ring buffers]] and bit-reversed addressing mode for [[Fast Fourier transform|FFT]] cross-referencing

*DSPs sometimes use time-stationary encoding to simplify hardware and increase coding efficiency.{{Citation needed|date=March 2020|reason=Please link to something that defines 'time-stationary encoding'}}

*Multiple arithmetic units may require [[memory architecture]]s to support several accesses per instruction cycle --– typically supporting reading 2 data values from 2 separate data buses and the next instruction (from the instruction cache, or a 3rd program memory) simultaneously.<ref>

[http://users.ece.utexas.edu/~bevans/courses/ee382c/lectures/02_signal_processing/project1.html "Memory and DSP Processors"].

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