Push–pull output: Difference between revisions

Revision as of 15:17, 28 April 2021

Revision as of 15:29, 28 April 2021

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== Digital circuits ==

[[File:7400 Circuit.svg|right|thumb|Circuit of [[Transistor–transistor logic|TTL]]{{dn|date=April 2021}} [[NAND gate]] has a 'totem pole output' stage ''(right)'' consisting of two NPN transistors in push pull. When transistor ''V''₂ is turned off, ''V''₃ is turned on and ''V''₄ off, pulling output voltage high. When ''V''₂ is on, ''V''₃ is off and ''V''₄ is turned on, pulling output low.]]

A digital use of a push–pull configuration is the output of TTL and related families. The upper transistor is functioning as an active pull-up, in linear mode, while the lower transistor works digitally. For this reason they are not capable of supplying as much current as they can ''sink'' (typically 20 times less). Because of the way these circuits are drawn schematically, with two transistors stacked vertically, normally with a level shifting diode in between, they are called "'''totem pole'''" outputs.