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* [[Processor register]]s – the fastest possible access (usually 1 CPU cycle). A few thousand bytes in size
* [[CPU cache|Cache]]
** Level 0 (L0) [[Micro-operation|Micro operations]] cache – 6
** Level 1 (L1) [[Opcode|Instruction]] cache – 128
** Level 1 (L1) Data cache – 128
** Level 2 (L2) Instruction and data (shared) – 1 [[
** Level 3 (L3) Shared cache – 6
** Level 4 (L4) Shared cache – 128
* [[Computer memory|Main memory]] ([[Primary storage]]) – [[
* [[Disk storage]] ([[Secondary storage]]) – [[
* [[Nearline storage]] ([[Tertiary storage]]) – Up to [[exabytes]]{{efn|name=prefix_storage}} in size. As of 2013, best access speed is about 160 MB/s<ref>{{cite web |url=http://www.lto.org/technology/generations.html |title=Ultrium - LTO Technology - Ultrium GenerationsLTO |publisher=Lto.org |access-date=2014-07-31 |url-status=dead |archive-url=https://web.archive.org/web/20110727052050/http://www.lto.org/technology/generations.html |archive-date=2011-07-27 }}</ref>
* [[Offline storage]]
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* [[Memory access pattern]]
* [[Communication-avoiding algorithm]]
==Notes==
{{notelist}}
==References==
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