Dynamic frequency scaling: Difference between revisions

Revision as of 10:49, 29 December 2020

Revision as of 19:00, 4 May 2021

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== Functioning ==

{{see also|Processor power dissipation#Sources}}

The dynamic power (''[[switching power]]'') dissipated per unit of time by a chip is ''C·V²·A·f'', where C is the [[capacitance]] being switched per clock cycle, V is [[voltage]], A is the Activity Factor<ref name="ActivityFactor">{{cite journal | title = Timing-aware power-optimal ordering of signals | author = K. Moiseev, A. Kolodny and S. Wimer | workjournal = ACM Transactions on Design Automation of Electronic Systems, Volume 13 Issue 4, September 2008}}</ref> indicating the average number of switching events undergone by the transistors in the chip (as a unit-less quantity) and f is the switching frequency.<ref>{{Cite book|first=J. M.|last= Rabaey|title= Digital Integrated Circuits|publisher= Prentice Hall|year= 1996}}</ref>

Voltage is therefore the main determinant of power usage and heating.<ref>{{cite web|url=https://software.intel.com/en-us/blogs/2014/02/19/why-has-cpu-frequency-ceased-to-grow|author= Victoria Zhislina|date=2014-02-19|title=Why has CPU frequency ceased to grow?|publisher=Intel}}</ref> The voltage required for stable operation is determined by the frequency at which the circuit is clocked, and can be reduced if the frequency is also reduced.<ref>https://www.usenix.org/legacy/events/hotpower/tech/full_papers/LeSueur.pdf</ref> Dynamic power alone does not account for the total power of the chip, however, as there is also static power, which is primarily because of various leakage currents. Due to static power consumption and asymptotic execution time it has been shown that the energy consumption of a piece of software shows convex energy behavior, i.e., there exists an optimal CPU frequency at which energy consumption is minimal.<ref>{{cite journal | author = K. De Vogeleer| title = The Energy/Frequency Convexity Rule: Modeling and Experimental Validation on Mobile Devices |year=2014 | arxiv = 1401.4655|display-authors=etal|bibcode=2014arXiv1401.4655D}}</ref>

[[Subthreshold leakage|Leakage current]] has become more and more important as transistor sizes have become smaller and threshold voltage levels lower. A decade ago, dynamic power accounted for approximately two-thirds of the total chip power. The power loss due to leakage currents in contemporary CPUs and SoCs tend to dominate the total power consumption. In the attempt to control the leakage power, [[High-κ dielectric|high-k metal-gates]] and power gating have been common methods.