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'''ATPG''', or '''Automatic test pattern generation''' is an [[electronic design automation]] tool used to find an input (or test) sequence that, when applied to a [[digital circuit]], enables testers to distinguish between the correct circuit behavior and the faulty circuit behavior caused by a particular fault. The patterns generated are used to test semiconductor devices after manufacture, and perhaps attempt to determine the cause of failure ([[failure analysis]].<ref>{{cite conference| last=Crowell| first=G| coauthors=Press, R.| title=Using Scan Based Techniques for Fault Isolation in Logic Devices| booktitle=Microelectronics Failure Analysis | pages= pp. 132-8}}</ref>) The effectiveness of ATPG is measured by the fault coverage achieved for the [[fault model]] and the number of generated vectors, which should be directly proportional to test application time. ATPG efficiency is another important consideration. It is influenced by the fault model under consideration, the type of circuit under test ([[Scan chain|full scan]], synchronous sequential, or asynchronous sequential), the level of abstraction used to represent the circuit under test (gate, register-transistor, switch), and the required [[Fault coverage|test quality]].
{{Merge|Automatic Test Pattern Generation|date=January 2007}}
 
'''ATPG''', or '''Automatic test pattern generation''' is an [[electronic design automation]] tool used to find an input (or test) sequence that, when applied to a [[digital circuit]], enables testers to distinguish between the correct circuit behavior and the faulty circuit behavior caused by a particular fault. The effectiveness of ATPG is measured by the fault coverage achieved for the [[fault model]] and the number of generated vectors, which should be directly proportional to test application time. ATPG efficiency is another important consideration. It is influenced by the fault model under consideration, the type of circuit under test ([[Scan chain|full scan]], synchronous sequential, or asynchronous sequential), the level of abstraction used to represent the circuit under test (gate, register-transistor, switch), and the required [[Fault coverage|test quality]].
 
== Basics of ATPG ==
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* [[ASIC]]
* [[VHSIC]]
{{EDASeeAlso}}
 
== References ==
*''Electronic Design Automation For Integrated Circuits Handbook'', by Lavagno, Martin, and Scheffer, ISBN 0-8493-3096-3 A survey of the field, from which the above summary was derived, with permission.
*{{cite book| title=Microelectronics Failure Analysis | year=2004 |publisher=ASM International | ___location=Materials Park, Ohio| id= ISBN 0-87170-804-3 }}
<references/>
 
[[Category:Digital electronics]]