Programmable ROM: Difference between revisions

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Revise memory can be programmed just once regarding BRK for patches
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== Programming ==
[[File:ANT Nachrichtentechnik DBT-03 - Texas Instruments TBP18SA030N-0019.jpg|thumb|Texas Instruments PROM type TBP18SA030N]]
A typical PROM comes with all bits reading as "1". Burning a fuse bit during programming causes the bit to be read as "0" by "blowing" the fuses, which is an irreversible process. TheSome memorydevices can be programmed"reprogrammed" justif oncethe afternew manufacturingdata byreplaces "blowing1"s with "0"s. Some CPU instruction sets ([[MOS_Technology_6502#Bugs_and_quirks]]) took advantage of this by defining a break (BRK) instruction with the fuses,operation whichcode isof '00'. In cases where there was an irreversibleincorrect processinstruction, it could be "reprogrammed" to a BRK causing the CPU to transfer control to a patch. This would execute the correct instruction and return to the instruction after the BRK.
 
The bit cell is programmed by applying a high-voltage pulse not encountered during a normal operation across the gate and substrate of the thin oxide transistor (around 6{{nbsp}}V for a 2&nbsp;nm thick oxide, or 30{{nbsp}}MV/cm) to break down the oxide between gate and substrate. The positive voltage on the transistor's gate forms an inversion channel in the substrate below the gate, causing a tunneling current to flow through the oxide. The current produces additional traps in the oxide, increasing the current through the oxide and ultimately melting the oxide and forming a conductive channel from gate to substrate. The current required to form the conductive channel is around 100{{nbsp}}µA/100{{nbsp}}nm{{sup|2}} and the breakdown occurs in approximately 100{{nbsp}}µs or less.<ref>{{cite web |url=http://www.sidense.com/images/stories/designcon_8_a_eval_embedded_nvm_65nm_and_beyond.pdf |title=Evaluating Embedded Non-Volatile Memory for 65nm and Beyond |author=Wlodek Kurjanowicz |year=2008 |access-date=2009-09-04 |url-status=dead |archive-url=https://web.archive.org/web/20160304025935/http://www.sidense.com/images/stories/designcon_8_a_eval_embedded_nvm_65nm_and_beyond.pdf |archive-date=2016-03-04 }}</ref>