Revision as of 10:52, 2 November 2021 edit PantheraLeo1359531 (talk \| contribs) 398 edits m Added a diagram of the different cell types ← Previous edit		Revision as of 10:54, 2 November 2021 edit undo PantheraLeo1359531 (talk \| contribs) 398 edits m →Triple-level cell: Added image of TLC SSD storage Next edit →
Line 45: == Triple-level cell == [[File:WDC WDS200T2B0A-00SM50 2000,3 GB SATA Vorderseite 20211008 SSD024corr.png\|thumb\|alt=Image of a 2TB-3D-NAND-SSD\|A triple-level cell storage]] A '''triple-level cell''' ('''TLC''') is a type of [[NAND flash]] memory that stores 3 bits of information per cell. [[Toshiba]] introduced memory with triple-level cells in 2009.<ref name="toshiba2009">{{cite news \|title=Toshiba Makes Major Advances in NAND Flash Memory with 3-bit-per-cell 32nm generation and with 4-bit-per-cell 43nm technology \|url=http://www.toshiba.co.jp/about/press/2009_02/pr1102.htm \|access-date=21 June 2019 \|work=[[Toshiba]] \|date=11 February 2009}}</ref>

Multi-level cell: Difference between revisions