Locality of reference: Difference between revisions

Revision as of 08:32, 12 August 2021

Revision as of 12:30, 26 November 2021

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* L1 [[CPU cache]]s (32 KB to 512 [[kilobyte|KB]]) – fast access, with the speed of the innermost memory bus owned exclusively by each core

* L2 CPU caches (128 KB to 24 [[megabyte|MB]]) – slightly slower access, with the speed of the [[memory bus]] shared between twins of cores

* L3 CPU caches (2 MB up to 32a max of 64 [[megabyte|MB]]) – even slower access, with the speed of the memory bus shared between even more cores of the same processor

* Main [[physical memory]] ([[random-access memory|RAM]]) (256 MB to 64 [[gigabyte|GB]]) – slow access, the speed of which is limited by the spatial distances and general hardware interfaces between the processor and the memory modules on the [[motherboard]]

* Disk ([[virtual memory]], [[file system]]) (1 GB to 256 [[terabyte|TB]]) – very slow, due to the narrower (in bit width), physically much longer data channel between the main board of the computer and the disk devices, and due to the extraneous software protocol needed on the top of the slow hardware interface