Logic simulation: Difference between revisions

Revision as of 18:00, 6 March 2020

Revision as of 18:11, 2 December 2021

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{{Redirect|Functional simulation|the simulation of program functionality|High-level emulation}}

'''Logic simulation''' is the use of [[Computer simulation|simulation software]] to predict the behavior of [[digital circuit]]s and [[hardware description language]]s.<ref name="WangChang2009">{{cite book|author1=Laung-Terng Wang|author2=Yao-Wen Chang|author3=Kwang-Ting (Tim) Cheng|title=Electronic Design Automation: Synthesis, Verification, and Test|url=https://books.google.com/books?id=3XBe7dLb5NEC&printsec=frontcover#v=snippet&q=%22logic%20simulation+simulation%22&f=false|date=11 March 2009|publisher=Morgan Kaufmann|isbn=978-0-08-092200-3}}</ref><ref name="LitovskiZwolinski1996">{{cite book|author1=V. Litovski|author2=Mark Zwolinski|title=VLSI Circuit Simulation and Optimization|url=https://books.google.com/books?id=Ca9DJs9-SPYC&printsec=frontcover#v=snippet&q=%22logic%20simulation+simulation%22&f=false|date=31 December 1996|publisher=Springer Science & Business Media|isbn=978-0-412-63860-2}}</ref> Simulation can be performed at varying degrees of [[Abstraction (computer science)|physical abstraction]], such as at the [[SPICE|transistor level]], [[digital circuit|gate level]], [[register-transfer level]] (RTL), [[electronic system-level design and verification|electronic system-level]] (ESL), or behavioral level.

==Use in verification==