Programmable ROM: Difference between revisions

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Commercially available semiconductor antifuse-based OTP memory arrays have been around at least since 1969, with initial antifuse bit cells dependent on blowing a capacitor between crossing conductive lines. [[Texas Instruments]] developed a MOS [[gate oxide]] breakdown antifuse in 1979.<ref>See [http://patimg2.uspto.gov/.piw?Docid=4184207&idkey=NONE US Patent 4184207] - High density floating gate electrically programmable ROM, and [http://patimg2.uspto.gov/.piw?Docid=4151021&idkey=NONE US Patent 4151021] {{webarchive|url=https://web.archive.org/web/20180427092847/http://patimg2.uspto.gov/.piw?Docid=4151021&idkey=NONE |date=2018-04-27 }} - Method of making a high density floating gate electrically programmable ROM</ref> A dual-gate-oxide two-transistor (2T) MOS antifuse was introduced in 1982.<ref>[http://www.chipestimate.com/techtalk/techtalk_071218.html Chip Planning Portal]. ChipEstimate.com. Retrieved on 2013-08-10.</ref> Early oxide breakdown technologies exhibited a variety of scaling, programming, size and manufacturing problems that prevented volume production of memory devices based on these technologies.

Another form of one-time programmable memory device uses the same semiconductor chip as an ultraviolet-[[EPROM|erasable programmable read-only memory]] (UV-EPROM), but the finished device is put into an opaque package, instead of the expensive ceramic package with transparent quartz window required for erasing. These devices are programmed with the same methods as the UV EPROM parts but are less costly. Embedded controllers may be available in both field-erasable and one-time styles, allowing a cost saving in volume production without the expense and lead time of factory-programmed mask ROM chips. <ref>Ken Arnold, "Embedded Controller Hardware Design", Newnes, 2004, ISBN 1-878707-52-3, page 102</ref>

Although antifuse-based PROM has been available for decades, it wasn’t available in standard [[CMOS]] until 2001 when Kilopass Technology Inc. patented 1T, 2T, and 3.5T antifuse bit cell technologies using a standard CMOS process, enabling integration of PROM into logic CMOS chips. The first process node antifuse can be implemented in standard CMOS is 0.18&nbsp;um. Since the gate oxide breakdown is less than the junction breakdown, special diffusion steps were not required to create the antifuse programming element. In 2005, a split channel antifuse device<ref>See [http://patimg2.uspto.gov/.piw?Docid=7402855&idkey=NONE US Patent 7402855] split channel antifuse device</ref> was introduced by Sidense. This split channel bit cell combines the thick (IO) and thin (gate) oxide devices into one transistor (1T) with a common [[Polycrystalline silicon|polysilicon]] gate.