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[[Prime Computer|Prime]], [[Stratus Technologies|Stratus]], [[Apollo Computer|Apollo]], [[IBM System/38]], and [[IBM AS/400]] (including [[IBM i]]) computers use memory segmentation.
==Examples==
==x86 architecture==▼
===S/370 architecture===
In the [[IBM System/370]] <ref name=S370>{{cite manual
| title = IBM System/370 Principles of Operation
| id = GA22-7000-4
| edition = Fourth
| date = September 1974
| url = http://www.bitsavers.org/pdf/ibm/370/princOps/GA22-7000-4_370_Principles_Of_Operation_Sep75.pdf
| format = PDF
| work = Systems
| publisher = IBM
}}
</ref> models{{efn|Models 115, 125, 135, 138, 145, 148, 155 II, 158, 165 II and 168}} with virtual storage and 24-bit addresses, [[control register]] 0 specifies a segment size of either 64 KiB or 1 MiB and a page size of either 2 KiB or 4 KiB; control register 1 specifies the length and real address of the segment table.
Starting with the [[IBM 303X|3031, 3032 and 3033]] processor complexes, IBM offered a feature called ''Dual-address Space'' (DAS)<ref name=S370-XA>{{cite manual
| title = IBM System/370 Extended Architecture Principles of Operation
| id = SA22-7085-1
| edition = Second
| date = January 1987
| url = http://bitsavers.org/pdf/ibm/370/princOps/SA22-7085-1_370-XA_Principles_of_Operation_Jan87.pdf
| publisher = IBM
}}
</ref> that allowed a program to switch between the translation tables for two different address spaces, refered to as ''primary address space'' (CR1) and ''secondary address space'' (CR7), and to move data between the address spaces subject to protection key. DAS supported translation tables to convert a 16-bit address space number (ASN) to a segment table and length, with privileged instructions to load the segment table information into CR1 (primary) or CR7 (secondary).
▲===x86 architecture===
{{Main|x86 memory segmentation}}
The memory segmentation used by early [[x86]] processors, beginning with the [[Intel 8086]], does not provide any protection. Any program running on these processors can access any segment with no restrictions. A segment is only identified by its starting ___location; there is no length checking. The segment starting address granularity is 16 bytes and the offset is 16 bits, supporting segment sizes up to 64 KiB, so segments can (and often do) overlap and each physical address can be denoted by 4096 different segment–offset pairs (allowing for address offset wrap-around).
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* [[Segmentation fault]]
* [[Flat memory model]]
==Notes==
{{notelist}}
== References ==
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