FIFO (computing and electronics): Difference between revisions

Revision as of 22:17, 30 October 2021

Revision as of 04:16, 14 January 2022

Line 68:

FIFOs are commonly used in [[electronics|electronic]] circuits for buffering and flow control between hardware and software. In its hardware form, a FIFO primarily consists of a set of read and write [[Pointer (computer programming)|pointers]], storage and control logic. Storage may be [[static random access memory]] (SRAM), [[Flip-flop (electronics)|flip-flops]], latches or any other suitable form of storage. For FIFOs of non-trivial size, a dual-port SRAM is usually used, where one port is dedicated to writing and the other to reading.

The first known FIFO implemented in electronics was by Peter Alfke in 1969 at [[Fairchild Semiconductor]].<ref name="Alfke">[{{cite web| url = http://www.fpga-faq.com/archives/10775.html#10794| title = Peter Alfke's post at comp.arch.fpga on 19 Jun 1998]}}</ref> Alfke was later a director at [[Xilinx]].

=== Synchronicity ===