Revision as of 14:21, 28 December 2021 edit Citation bot (talk \| contribs) Bots 5,870,994 edits Alter: title. \| Use this bot. Report bugs. \| Suggested by BrownHairedGirl \| Linked from User:BrownHairedGirl/Articles_with_bare_links \| #UCB_webform_linked 1636/2196 ← Previous edit		Revision as of 15:09, 28 January 2022 edit undo Amakuru (talk \| contribs) Autopatrolled, Administrators 119,847 edits m →Integrated FPUs: disambiguate Tag: AWB Next edit →
Line 42: In some cases, FPUs may be specialized, and divided between simpler floating-point operations (mainly addition and multiplication) and more complicated operations, like division. In some cases, only the simple operations may be implemented in hardware or [[microcode]], while the more complex operations are implemented as software. In some current architectures, the FPU functionality is combined with [[Single instruction, multiple data\|SIMD]] units to perform SIMD computation; an example of this is the augmentation of the [[x87]] instructions set with [[Streaming SIMD Extensions\|SSE]] instruction set in the [[x86-64]] architecture used in newer Intel and AMD processors. == Add-on FPUs ==

Floating-point unit: Difference between revisions