Revision as of 20:31, 1 February 2022 edit Frankplow (talk \| contribs) 74 edits Propose merger from PAL, PLA, GAL Tag: Reverted ← Previous edit		Revision as of 22:09, 1 February 2022 edit undo Merge bot (talk \| contribs) Bots, Administrators 38,211 edits m Bypass redirect in merge template – DIFFCAPS Tag: Reverted Next edit →
Line 1: {{mergefrom\|Programmable ~~array~~Array ~~logic~~Logic\|Programmable logic array\|Generic array logic\|discuss=Talk:Simple programmable logic device#Merger proposal\|date=February 2022}} {{moreref\|date=November 2012}} A '''simple programmable logic device''' ('''SPLD''') is a [[programmable logic device]] with complexity below that of a [[complex programmable logic device\|complex programmable logic device (CPLD)]].

Simple programmable logic device: Difference between revisions