Gate array: Difference between revisions

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[[Sinclair Research]] ported an enhanced [[Sinclair ZX80|ZX80]] design to a ULA chip for the [[Sinclair ZX81|ZX81]], and later used a ULA in the [[ZX Spectrum]]. A compatible chip was made in Russia as T34VG1.<ref>[[:ru:Т34ВГ1|Т34ВГ1]] — article about the ZX Spectrum ULA compatible chip {{in lang|ru}}</ref> [[Acorn Computers]] used several ULA chips in the [[BBC Micro]], and later a single ULA for the [[Acorn Electron]]. Many other manufacturers from the time of the [[home computer]] boom period used ULAs in their machines. The [[IBM PC]] took over much of the personal computer market, and the sales volumes made full-custom chips more economical. Commodore's Amiga series used gate arrays for the Gary and Gayle custom-chips, as their code-names may suggest.

In an attempt to reduce the costs and increase the accessibility of gate array design and production, Ferranti introduced in 1982 a computer-aided design tool for their uncommitted logic array (ULA) product called ULA Designer. Although costing £46,500 to acquire, this tool promised to deliver reduced costs of around £5,000 per design plus manufacturing costs of £1-2 per chip in high volumes, in contrast to the £15,000 design costs incurred by engaging Ferranti's services for the design process.<ref name="design198203_ferranti">{{ cite magazine | url=https://archive.org/details/sim_design_1982-03_399/page/n20/mode/1up | title=Make chips at home | magazine=Design | date=March 1982 | access-date=1 March 2022 | pages=17 }}</ref> Based on a PDP -11/23 minicomputer running RSX/11M, together with graphical display, keyboard, "digitalizing board", control desk and optional plotter, the solution aimed to satisfy the design needs of gate arrays from 100 to 10,000 gates, with the design being undertaken entirely by the organisation acquiring the solution, starting with a "logic plan", proceeding through the layout of the logic in the gate array itself, and concluding with the definition of a test specification for verification of the logic and for establishing an automated testing regime. Verification of completed designs was performed by "external specialists" after the transfer of the design to a "CAD center" in Manchester, England or Sunnyvale, California, potentially over the telephone network. Prototyping completed designs took an estimated 3 to 4 weeks. The minicomputer itself was also adaptable to run as a laboratory or office system where appropriate.<ref name="dtic_ada352628">{{ cite techreport | url=https://archive.org/details/DTIC_ADA352658/page/n4/mode/1up | title=Ferranti Introduces CAD System for Gate Arrays | work=West Europe Report, Science and Technology | date=2 June 1982 | access-date=1 March 2022 | issue=105 | pages=1-2 }}</ref>

Ferranti followed up on the ULA Designer with the Silicon Design System product based on the VAX-11/730 with 1&nbsp;MB of RAM, 120&nbsp;MB Winchester disk, and utilising a high-resolution display driven by a graphics unit with 500&nbsp;KB of its own memory for "high speed windowing, painting, and editing capabilities". The software itself was available separately for organisations already likely to be using VAX-11/780 systems to provide a multi-user environment, but the "standalone system" package of hardware and software was intended to provide a more affordable solution with a "faster response" during the design process. The suite of tools involved in the use of the product included logic entry and test schedule definition (using Ferranti's own description languages), logic simulation, layout definition and checking, and mask generation for prototype gate arrays. The system also sought to support completely auto-routed designs, utilising architectural features of Ferranti's auto-routable (AR) arrays to deliver a "100-percent success auto-layout system" with this convenience incurring an increase in silicon area of approximately 25 percent. <ref name="computerdesign198403_ferranti">{{ cite magazine | url=https://archive.org/details/bitsavers_computerDe_409597766/page/197/mode/1up | title=Automation Cuts Design Time for Gate Arrays | magazine=Computer Design | date=March 1984 | access-date=1 March 2022 | last1=Walker | first1=Anthony V. | pages=197-198,200,202,204 }}</ref>

===Boom===