Content deleted Content added
m Fix broken anchor: 2021-12-22 #Associative_Processor→Flynn's taxonomy#Associative processor |
Guy Harris (talk | contribs) →SIMD, SIMT and Vector Predication: Fix capitalization. Link a phrase to the section of Flynn's taxonomy, rather than linking "Flynn's taxonomy", to make it a bit less of a MOS:EASTEREGG. |
||
Line 73:
In the [[ARM architecture]], the original 32-bit instruction set provides a feature called ''conditional execution'' that allows most instructions to be predicated by one of 13 predicates that are based on some combination of the four condition codes set by the previous instruction. ARM's [[ARM architecture#Thumb|Thumb]] instruction set (1994) dropped conditional execution to reduce the size of instructions so they could fit in 16 bits, but its successor, [[ARM architecture#Thumb-2|Thumb-2]] (2003) overcame this problem by using a special instruction which has no effect other than to supply predicates for the following four instructions. The 64-bit instruction set introduced in ARMv8-A (2011) replaced conditional execution with conditional selection instructions.
== SIMD, SIMT and
Some [[SIMD]] instruction sets, like AVX2, have the ability to use a logical [[Mask (computing)|mask]] to conditionally load/store values to memory, a parallel form of the conditional move, and may also apply individual mask bits to individual arithmetic units executing a parallel operation. The technique
This form of predication is also used in [[
==See also==
| |||