Micro-Controller Operating Systems: Difference between revisions

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{{Infobox OS
| name = MicroC/OS
| logo =
| caption =
| developer = Micrium, Inc.,<br />Silicon Labs
| source model = [[Open Source]], Apache license (as of 2020)
| released = {{Start date and age|1991}}
| supported platforms = [[ARM Cortex-M#Cortex-M3|ARM Cortex-M3]], [[ARM Cortex-M#Cortex-M4|Cortex-M4F]], [[ARM7#ARM7TDMI|ARM7TDMI]]; [[Atmel AVR]]; [[eSi-RISC]], and many others.
| ui = μC/[[Graphical user interface|GUI]]
| family = [[Real-time operating system]]s
| latest release version = OS-III
| latest release date = {{Start date and age|2016}}
| marketing target = [[Embedded device]]s
| programmed in = [[ANSI C]]
| kernel type = [[Microkernel]]
| language = English
| working state = Current
| license = [[Open Source]] as of 2020. Previously [[Commercial software|Commercial]], [[freeware]] education use.
| website = {{URL|www.micrium.com/products}}
| repo = {{URL|github.com/SiliconLabs}}
}}
'''Micro-Controller Operating Systems''' ('''MicroC/OS''', stylized as '''μC/OS''') is a [[real-time operating system]] (RTOS) designed by Jean J. Labrosse in 1991. It is a priority-based [[Preemption (computing)|preemptive]] [[Real-time computing|real-time]] kernel for [[microprocessor]]s, written mostly in the programming language [[C (programming language)|C]]. It is intended for use in [[embedded system]]s.
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The [[Kernel (operating system)|kernel]] is the name given to the program that does most of the housekeeping tasks for the operating system. The boot loader hands control over to the kernel, which initializes the various devices to a known state and makes the computer ready for general operations.<ref>[[Wikiversity:Operating Systems/Kernel Models#Monolithic Kernel]]</ref> The kernel is responsible for managing tasks (i.e., for managing the CPU's time) and communicating between tasks.<ref>{{cite book|last=Labrosse|first=Jean J.|title=MicroC/OS-II: The Real Time Kernel|page=39|edition=Second}}</ref> The fundamental service provided by the kernel is [[context switch]]ing.
 
The [[scheduler]] is the part of the kernel responsible for determining which task runs next.<ref name="LabrosseP40">{{cite book|last=Labrosse|first=Jean J.|title=MicroC/OS-II: The Real Time Kernel|page=40|edition=Second}}</ref> Most real-time kernels are priority based. In a priority-based kernel, control of the CPU is always given to the highest priority task ready to run. Two types of priority-based kernels exist: [[Computer multitasking#Cooperative multitasking|non-preemptive]] and [[Preemption (computing)|preemptive]]. Nonpreemptive kernels require that each task do something to explicitly give up control of the CPU.<ref name="LabrosseP40" /> A preemptive kernel is used when system responsiveness is more important. Thus, μC/OS-II and most commercial real-time kernels are preemptive.<ref>{{cite book|last=Labrosse|first=Jean J.|title=MicroC/OS-II: The Real Time Kernel|page=42|edition=Second}}</ref> The highest priority task ready to run is always given control of the CPU.
 
===Assigning tasks===
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===Managing memory===
To avoid [[Fragmentation (computing)|fragmentation]], μC/OS-II allows applications to obtain fixed-sized memory blocks from a [[Memory management (operating systems)#Partitioned allocation|partition]] made of a contiguous memory area. All memory blocks are the same size, and the partition contains an [[integral]] number of blocks. Allocation and deallocation of these memory blocks is done in constant time and is a [[deterministic system]].<ref>{{cite book|last=Labrosse|first=Jean J.|title=MicroC/OS-II: The Real Time Kernel|pages=273–285|edition=Second}}</ref>
 
===Managing time===
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Sometimes, a task or ISR must communicate information to another task, because it is ''unsafe'' for two tasks to access the same specific data or hardware resource at once. This can be resolved via an information transfer, termed inter-task communication. Information can be communicated between tasks in two ways: through global data, or by sending messages.
 
When using global variables, each task or ISR must ensure that it has exclusive access to variables. If an ISR is involved, the only way to ensure exclusive access to common variables is to disable [[interrupt]]s. If two tasks share data, each can gain exclusive access to variables by either disabling interrupts, locking the scheduler, using a [[Semaphore (programming)|semaphore]], or preferably, using a [[mutual exclusion]] semaphore. Messages can be sent to either an intermediate object called a [[message queue]], or directly to a task, since in μC/OS-III, each task has its own built-in message queue. Use an external message queue if multiple tasks are to wait for messages. Send a message directly to a task if only one task will process the data received. While a task waits for a message to arrive, it uses no CPU time.
 
==Ports==
A port involves three aspects: CPU, OS, and board specific (BSP) code. μC/OS-II and μC/OS-III have ports for most popular processors and boards in the market and are suitable for use in [[safety critical]] embedded systems such as aviation, medical systems, and nuclear installations. A μC/OS-III port involves writing or changing the contents of three kernel specific files: <code>OS_CPU.H</code>, <code>OS_CPU_A.ASM</code>, and <code>OS_CPU_C.C</code>. It is necessary to write or change the content of three CPU specific files: <code>CPU.H</code>, <code>CPU_A.ASM</code>, and <code>CPU_C.C</code>. Finally create or change a board support package (BSP) for the evaluation board or target board being used. A μC/OS-III port is similar to a μC/OS-II port. There are significantly more ports than listed here, and ports are subject to continuous development. Both μC/OS-II and μC/OS-III are supported by popular [[Transport Layer Security|SSL/TLS]] libraries such as [[wolfSSL]], which ensure security across all connections.
 
 
==Licensing Change==
After acquisition by Silicon Labs, Micrium in 2020 has changed to an Open Source licensing model in February 2020. This includes uC/OS III, all prior versions, all components (USB, file system, GUI, TCP/IP, etc).
 
 
==Documentation and Support==