Multi-channel memory architecture: Difference between revisions

Revision as of 14:18, 31 March 2022

Revision as of 16:50, 5 May 2022

Line 8:

In the fields of [[digital electronics]] and [[computer hardware]], '''multi-channel memory architecture''' is a technology that increases the data transfer rate between the [[DRAM]] memory and the [[memory controller]] by adding more channels of communication between them. Theoretically, this multiplies the data rate by exactly the number of channels present. Dual-channel memory employs two channels. The technique goes back as far as the 1960s having been used in [[IBM System/360 Model 91]] and in [[CDC 6600]].<ref name="JacobNg2007">{{cite book| first1=Bruce | last1 = Jacob | first2 = Spencer | last2 = Ng | first3=David | last3 = Wang|title= Memory systems: cache, DRAM, disk|year = 2007 | publisher = Morgan Kaufmann|isbn=978-0-12-379751-3|page= 318}}</ref>

Modern high-end desktop and workstation processors such as the [[Advanced Micro Devices|AMD]] [[Ryzen Threadripper]] series and the [[Intel]] [[List of Intel Core i9 processors|Core i9 Extreme Edition]] lineup support quad-channel memory. Server processors from the AMD [[Epyc]] series and the Intel [[Xeon]] platforms give support to memory bandwidth starting from quad-channel module layout to up to octa-channel layout.<ref>{{Cite web|last=jpringle|date=September 12, 2017|title=Benchmarking Epyc, Ryzen, and Xeon: Tyranny of Memory|url=https://www.myroms.org/forum/viewtopic.php?p=18295|url-status=live|access-date=April 23, 2021|website=[[Regional Ocean Modeling System]]}}</ref> In March 2010, AMD released [[Socket G34]] and Magny-Cours Opteron 6100 series<ref name = Opteron6100>{{cite web | publisher = AMD | title = Opteron 6000 Series Platform Quick Reference Guide | url = http://sites.amd.com/us/documents/48101a_opteron%20_6000_qrg_rd2.pdf | access-date = 2012-10-15 | archive-url = https://web.archive.org/web/20120512170219/http://sites.amd.com/us/Documents/48101A_Opteron%20_6000_QRG_RD2.pdf | archive-date = 2012-05-12 | url-status = dead }}</ref> processors with support for quad-channel memory. In 2006, Intel released chipsets that support quad-channel memory for its [[LGA771]] platform<ref>{{Citation | url = http://ark.intel.com/products/27746/Intel-5000P-Memory-Controller | publisher = Intel | title = 5000P memory controller}}.</ref> and later in 2011 for its [[LGA2011]] platform.<ref>{{Citation | url = http://www.techpowerup.com/138087/Intel-LGA2011-Socket-X68-Express-Chipset-Pictured.html | title = Intel LGA2011 socket x68 express chipset pictured | publisher = Tech power up}}.</ref> Microcomputer chipsets with even more channels were designed; for example, the chipset in the [[AlphaStation]] 600 (1995) supports eight-channel memory, but the [[backplane]] of the machine limited operation to four channels.<ref>{{Citation | journal = HP | url = http://www.hpl.hp.com/hpjournal/dtj/vol7num1/vol7num1art7.txt | title = The Design and Verification of the AlphaStation 600 5-series Workstation | volume = 7 | number = 1 | author1 = John H. Zurawski | author2 = John E. Murray | author3 = Paul J. Lemmon}}.</ref> <!-- TO-DO: Cite a machine where they actually used 8 channels. -->

== Dual-channel architecture ==