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The system is designed for hierarchical based systems with homogeneous or heterogeneous CPU cores which have local memories, connected via DMA engines or similar memory transfer models.
Sieve has been shown [https://web.archive.org/web/20070827225352/http://www.codeplay.com/technology/sievebenchmarks.html] successfully operating on multi-core x86 systems, the [[Ageia]] [[PhysX]] [[Physics Processing Unit]], and the IBM [[Cell microprocessor]]. [[ANSI C]] is generated if a compiler [[code generation (compiler)|code generator]] is not available for a certain target platform. This allows for autoparallelization using existing C compilation toolkits [http://mgrid.feis.herts.ac.uk/wp-content/scott.ppt]{{dead link|date=May 2018 |bot=InternetArchiveBot |fix-attempted=yes }}.
==See also==
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