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! scope=row | Reduced AVRtiny Core ("avrtiny10")
| {{ublist|ATtiny40|ATtiny20|ATtiny10|ATtiny9|ATtiny5|ATtiny4}}
| (Identical to minimal core, except for reduced CPU register set{{note label|reduced|a|a}})
| (Identical to classic core with up to 8K, except for reduced CPU register set{{note label|reduced|a|a}})
| Identical to classic core with up to 8K, with the following exceptions:{{aligned table|cols=2|col1style=font-family:monospace;|LPM|(removed)|LDD|(removed)|STD|(removed)|LD|(also accesses program memory)|LDS|(different bit pattern)|STS|(different bit pattern)||Reduced CPU register set{{note label|reduced|a|a}}}}
| (Identical to enhanced core with up to 128K, except for reduced CPU register set{{note label|reduced|a|a}})
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{{note label|reduced|a|a}} Reduced register set is limited to R16 through R31.<ref name="isa_manual"/>
== Instruction encoding ==
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