Memory segmentation: Difference between revisions

Revision as of 17:55, 3 May 2022

Revision as of 19:47, 11 July 2022

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Segments usually correspond to natural divisions of a program such as individual routines or data tables<ref name="holt1961"/> so segmentation is generally more visible to the programmer than [[paging]] alone.<ref name="englander"/>

Different segmentsSegments may be created for different program [[module (programming)|module]]s, or for different classes of memory usage such as [[Code segment|code]] and [[data segment]]s.<ref name="glaser1965"/> Certain segments may be shared between programs.<ref name="holt1961"/><ref name="englander" />

Segmentation was originally invented as a method by which [[system software]] could isolate different software [[Process (computing)|processes]] ([[Task (computing)|tasks]]) and data they are using. It was intended to increase reliability of the systems running multiple processes simultaneously.<ref name=":0">{{Cite book|url=https://www.amd.com/system/files/TechDocs/24593.pdf|title=AMD64 Technology AMD64 Architecture Programmer's Manual Volume 2: System Programming|publisher=Advanced Micro Devices|year=2018|volume=2|pages=5|language=en|chapter=1.2 Memory Management}}</ref> In a [[X86-64|x86-64 architecture]] it is considered legacy and most x86-64-based modern system software don't use memory segmentation. Instead they handle programs and their data by utilizing [[Paging|memory-paging]] which also serves as a way of memory protection. However most x86-64 implementations still support it for backward compatibility reasons.<ref name=":0" />

==Hardware implementation==

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Segmentation is one method of implementing [[memory protection]].<ref name="ostep-1">{{cite book|title=Operating Systems: Three Easy Pieces|chapter=Segmentation|chapter-url=http://pages.cs.wisc.edu/~remzi/OSTEP/vm-segmentation.pdf|publisher= Arpaci-Dusseau Books|year = 2014|first1 = Remzi H.|last1 =Arpaci-Dusseau|first2=Andrea C.|last2 = Arpaci-Dusseau}}</ref> [[Page (computer memory)|Paging]]<!-- please, do not "simplify" or "fix" the link. The [[paging]] article is about a virtual memory technique, not about memory protection --> is another, and they can be combined. The size of a memory segment is generally not fixed and may be as small as a single [[byte]].<ref>{{cite book|publisher=Intel Corporation|title=Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3 (3A, 3B & 3C): System Programming Guide|year=2012|pages=3–13|url=http://download.intel.com/products/processor/manual/325384.pdf}}</ref>

Segmentation has been implemented in several different ways on differentvarious hardware, with or without paging. Intel [[x86 memory segmentation]] does not fit either model and is discussed separately below, and also in greater detail in a separate article.

===Segmentation without paging===

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===Segmentation with paging===

Instead of an actuala memory ___location, the segment information includes the address of a [[page table]] for the segment.

When a program references a memory ___location the offset is translated to a memory address using the page table. A segment can be extended simply by allocating another memory page and adding it to the segment's page table.

An implementation of [[virtual memory]] on a system using segmentation with paging usually only moves individual pages back and forth between main memory and secondary storage, similar to a paged non-segmented system. Pages of the segment can be located anywhere in main memory and need not be contiguous. This usually results in a reduced amount of input/output between primary and secondary storage and reduced memory fragmentation.

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| publisher = IBM

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</ref> (DAS), which allows a program to switch between the translation tables for two different address spaces, referred to as ''primary address space'' (CR1) and ''secondary address space'' (CR7), and to move data between the address spaces subject to protection key. DAS supports a translation table to convert a 16-bit address space number (ASN) to an STD, with privileged instructions to load the STD into CR1 (primary) or CR7 (secondary).

===x86 architecture===

{{Main|x86 memory segmentation}}

The memory segmentation used by early [[x86]] processors, beginning with the [[Intel 8086]], does not provide any protection. Any program running on these processors can access any segment with no restrictions. A segment is only identified by its starting ___location; there is no length checking. The segment starting address granularity is 16 bytes and the offset is 16 bits, supporting segment sizes up to 64 KiB, so segments can (and often do) overlap and each physical address can be denoted by 4096 different segment&ndash;offset pairs (allowing for address offset wrap-around).

Segmentation in the [[Intel 80286]] and later provides protection: with the introduction of the 80286, Intel retroactively named the sole operating mode of the previous x86 CPU models "[[real mode]]" and introduced a new "[[protected mode]]" with protection features. For backward compatibility, all x86 CPUs start in "real mode" with no memory protection, fixed 64&nbsp;KiB segments, and only 20-bit (1024&nbsp;KiB) addressing. An 80286 or later processor must be switched into another mode by software in order to use its full address space and advanced MMU features.