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Guy Harris (talk | contribs) →Intro and definition: Don't confuse x86-style micro-operations with traditional microcode. |
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I've added a more sane definition to the overview along with a source. The intro one is too technical. <span style="font-weight: bold" >[[User:Alexander_Davronov|<span style="color:#a8a8a8;">AXO</span><span style="color:#000">NOV</span>]] [[User talk:Alexander_Davronov|(talk)]] [[Special:Contributions/Alexander_Davronov|⚑]]</span> 20:22, 19 July 2022 (UTC)
:[[Micro-operation]]s, in modern CISC processors such as [[P6 (microarchitecture)|P6]]-microarchitecture and later [[x86]] processors and at least some IBM [[System/390]] and [[z/Architecture]] microprocessors, are different from traditional microcode. Traditional microcode isn't generated on the fly from decoded instructions, but most micro-operations in modern processors are - some x86 microcode may consist of micro-ops stored on-chip, but I'm not sure whether modern IBM mainframe processors have any microcode such as that, instead relying on [[millicode]], which is composed of instructions from a subset of the S/390 or z/Architecture instruction set plus processor-specific extensions, to implement complex operations. [[User:Guy Harris|Guy Harris]] ([[User talk:Guy Harris|talk]]) 22:16, 19 July 2022 (UTC)
::{{diff2|1099262619|1099255239|Jul 19, 2022, 21:15}} - ''«Instruction decoding microcode: Micro-ops are different from traditional microcode. Traditional fully-microcoded processors fetch, decode, and execute operations were done by microcode; in micro-op processors, hardware fetches and decodes instructions, emitting a sequence of one or more micro-ops that are scheduled for execution. Intel's document is not authoritative here; it's focused on modern CISC processors.)»''<br/>
:::{{re|Guy Harris}} The source says: {{bquote|''«collection of microps (or μ-instructions) make up a microcode»''[https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/secure-coding/xucode-implementing-complex-instruction-flows.html]}}
::: The term ''μ-op'' and ''microcode'' are not the same but are mutually related. That's enough per source. See also:[https://www.google.ru/books/edition/Essentials_of_Computer_Architecture/ORINDgAAQBAJ?hl=en&gbpv=1&dq=instruction+microcode&pg=PA148&printsec=frontcover]{{rp|148}}
::: {{tqi|[…] Intel's document is not authoritative here […] }} See additional source above. The source is talking specifically about instructions-decoding microcode which simply map macro-instructions into a circuitry (e.g. ALU) that process data specified by macro-instructions. The microcode sits between decode & execute stages in the [[instruction cycle]]. It works like a microcontroller that treats MCU instructions as data and interprets it. I propose we keep my edit. Best.
:: <span style="font-weight: bold" >[[User:Alexander_Davronov|<span style="color:#a8a8a8;">AXO</span><span style="color:#000">NOV</span>]] [[User talk:Alexander_Davronov|(talk)]] [[Special:Contributions/Alexander_Davronov|⚑]]</span> 08:21, 20 July 2022 (UTC)
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