Revision as of 18:02, 4 May 2022 edit Ffffrr (talk \| contribs) Extended confirmed users 99,787 edits Adding local short description: "Computing technique employed to achieve parallelism", overriding Wikidata description "class of parallel computer architecture in Flynn's taxonomy, in which multiple operations are performed on multiple data points simultaneously" (Shortdesc helper) ← Previous edit		Revision as of 04:15, 22 August 2022 edit undo Citation bot (talk \| contribs) Bots 5,870,670 edits Alter: title. \| Use this bot. Report bugs. \| Suggested by BrownHairedGirl \| #UCB_webform 1034/1343 Next edit →
Line 9: An example of MIMD system is [[Xeon Phi\|Intel Xeon Phi]], descended from [[Larrabee (microarchitecture)\|Larrabee]] microarchitecture.<ref>{{Cite web\|url=http://perilsofparallel.blogspot.gr/2008/09/larrabee-vs-nvidia-mimd-vs-simd.html\|title = The Perils of Parallel: Larrabee vs. Nvidia, MIMD vs. SIMD\|date = 19 September 2008}}</ref> These processors have multiple processing cores (up to 61 as of 2015) that can execute different instructions on different data. Most parallel computers, as of 2013, are MIMD systems.<ref>{{cite web\|url=http://software.intel.com/en-us/articles/mimd \|title=~~Archived~~MIMD ~~copy~~\| Intel® Developer Zone \|access-date=2013-10-16 \|url-status=dead \|archive-url=https://web.archive.org/web/20131016215430/http://software.intel.com/en-us/articles/mimd \|archive-date=2013-10-16 }}</ref> ==Shared memory model==

Multiple instruction, multiple data: Difference between revisions