Content deleted Content added
Guy Harris (talk | contribs) Use Month Day, Year consistently for archive-date (I don't care which format is used, as long as the same format is used throughout; feel free to go with Day Month Year, I just used Month Day, Year as that's what the first archive-date in the article used.) |
Guy Harris (talk | contribs) Use the Wayback Machine for a now-dead link. |
||
Line 1:
{{Short description|Design decisions affecting processor cache speeds and sizes}}
{{Distinguish|cache replacement policies}}
A [[CPU cache]] is a memory which holds the recently utilized data by the processor. A block of memory cannot necessarily be placed randomly in the cache and may be restricted to a single [[CPU cache#Cache entries|cache line]] or a set of cache lines<ref name=":0">{{Cite web|url=https://cseweb.ucsd.edu/classes/su07/cse141/cache-handout.pdf|title=The Basics of Cache}}</ref> by the '''cache placement policy'''.<ref>{{Cite web|url=http://web.cs.iastate.edu/~prabhu/Tutorial/CACHE/bl_place.html|title=Cache Placement Policies}}</ref><ref>{{Cite web|url=http://fourier.eng.hmc.edu/e85_old/lectures/memory/node4.html|title=Placement Policies|archive-url=https://web.archive.org/web/20200814000302/http://fourier.eng.hmc.edu/e85_old/lectures/memory/node4.html|archive-date=August 14, 2020|url-status=dead}}</ref> In other words, the cache placement policy determines where a particular memory block can be placed when it goes into the cache.
There are three different policies available for placement of a memory block in the cache: direct-mapped, fully associative, and set-associative. Originally this space of cache organizations was described using the term "congruence mapping".<ref>{{Cite journal|last=Mattson|first=R.L.|author1-link=Richard Mattson|last2=Gecsei|first2=J.|last3=Slutz|first3=D. R.|last4=Traiger|first4=I|date=1970|title= Evaluation Techniques for Storage Hierarchies|journal=IBM Systems Journal|volume=9|issue=2|pages=78–117|doi=10.1147/sj.92.0078}}</ref>
| |||