Advanced Programmable Interrupt Controller: Difference between revisions

Revision as of 16:36, 7 August 2022

Revision as of 06:09, 18 December 2022

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== Overview ==

There are two components in the Intel APIC system, the ''local APIC'' (LAPIC) and the ''I/O APIC''. There is one LAPIC in each CPU in the system. In the very first implementation ('''82489DX'''), the LAPIC was a discrete circuit, as opposed to its thereafterlater implementation in Intel processors' silicon. There is typically one I/O APIC for each peripheral bus in the system. In original system designs, LAPICs and I/O APICs were connected by a dedicated APIC bus. Newer systems use the system bus for communication between all APIC components.

Each APIC, whether a discrete chip or integrated in a CPU, has a version register containing a four-bit version number for its specific APIC implementation. For example, the 82489DX has an APIC version number of 0, while version 1 was assigned to the first generation of local APICs integrated in the Pentium 90 and 100 processors.<ref>[http://www.intel.com/design/archives/processors/pro/docs/242016.htm Intel MultiProcessor Specification], version 1.4, page 3-5, May 1997</ref>

In systems containing an [[Intel 8259|8259]] PIC]], the 8259 may be connected to the LAPIC in the system's bootstrap processor (BSP), or to one of the system's I/O APICs, or both. Logically, however, the 8259 is only connected once at any given time.

==Discrete APIC==