Successive-approximation ADC: Difference between revisions

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m Charge-redistribution successive-approximation ADC: typo: surely the last editor meant "from" instead of "frond"
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# All of the capacitors within the array are switched to the input signal {{math|''V''<sub>in</sub>}}. The capacitors now have a charge equal to their respective capacitance times the input voltage minus the offset voltage upon each of them.
# The capacitors are then switched so that this charge is applied across the comparator input, creating a comparator input voltage equal to {{math|−''V''<sub>in</sub>}}.
# The actual conversion process proceeds. First, the MSB capacitor is switched frondfrom ground to {{math|''V''<sub>ref</sub>}}, which corresponds to the full-scale range of the ADC. Due to the binary-weighting of the array, the MSB capacitor forms a 1:1 charge divider with the rest of the array. Thus, the input voltage to the comparator is now {{math|−''V''<sub>in</sub> + {{frac|''V''<sub>ref</sub>|2}} }}. Subsequently, if {{math|''V''<sub>in</sub>}} is greater than {{frac|''V''<sub>ref</sub>|2}}, then the comparator outputs a digital 1 as the MSB and the capacitor remains connected to {{math|''V''<sub>ref</sub>}}, otherwise it outputs a digital 0 as the MSB and the capacitor is switched back to ground. Each capacitor is tested in the same manner until the comparator input voltage converges to the offset voltage, or at least as close as possible given the resolution of the DAC.
 
=== Use with non-ideal analog circuits ===