Priority encoder: Difference between revisions

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more slightly clarification to my {{efn}}
m clarify my {{efn}} is for the 147 BCD variant.
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A '''priority encoder''' is a [[Electronic circuit|circuit]] or [[algorithm]] that compresses multiple [[Binary code|binary]] inputs into a smaller number of outputs. The output of a priority encoder is the binary representation of the index of the most significant activated line, starting from zero. They are often used to control [[interrupt request]]s by acting on the highest priority interrupt input.
[[File:A 4-2 Priority Encoder .jpg|alt=A 4:2 Priority Encoder|thumb|486x486px|A 4:2 Priority Encoder|center]]
If two or more inputs are given at the same time, the input having the highest priority will take [[:wikt:precedence|precedence]].<ref>M. Morris Mano, Michael D. Ciletti, "Digital Design", 4th Edition, Prentice Hall, 2006, {{ISBN|978-0-13-198924-5}}.</ref> An example of a single bit 4 to 2 encoder is shown, where highest-priority inputs are to the left and "x" indicates an irrelevant value - i.e. any input value there yields the same output since it is superseded by higher-priority input. The (optionally-included{{efn|For instance, the [[List_of_7400-series_integrated_circuits|74x14874x147]] 10-to-4 [[BCD (character encoding)|BCD]] priority encoder does not have a dedicated output valid signal. However, invalid is indicated by all outputs simultaneously high. https://www.ti.com/lit/ds/symlink/sn74ls148.pdf}}) "v" output indicates if the input is valid.
 
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